ESP32-S3

Board type: esp32-s3

A real ESP32-S3 dev board, flashed over USB and reachable from your browser, CLI, or CI pipeline.

MCU	ESP32-S3 (dual-core Xtensa LX7 @ 240 MHz)
SRAM	512 KB
Wireless	Wi-Fi + Bluetooth LE
Flash tool	esptool
Serial	USB-UART bridge, 115200 baud

Firmware format

Raw .bin, flashed at 0x0. Upload a single merged image (bootloader + partition table + app); with ESP-IDF, idf.py merge-bin produces one. Maximum upload size is 16 MB.

Accepted formats: .bin only.

Quickstart

CLI

# A prebuilt image, so this needs no toolchain
curl -LO https://github.com/raws-labs/srig-examples/releases/latest/download/demo-shell-esp32-s3.bin
srig run demo-shell-esp32-s3.bin --board esp32-s3 --expect "0 failed"

# Your own build: the exit code is 0 when the pattern shows up
srig run build/merged.bin --board esp32-s3 --expect "Ready"

Python

import siliconrig

client = siliconrig.Client()
with client.session(board="esp32-s3") as session:
    session.flash("build/merged.bin")
    session.serial.expect("Ready", timeout=30)

Clean state

The board's flash is erased when your session ends. The next session starts from a blank chip, and nothing you flashed is visible to other users.

Use it in CI

• GitHub Actions with board: esp32-s3
• GitLab CI with SRIG_BOARD: esp32-s3

For a worked example with two ESP32-S3 boards talking over ESP-NOW, see Testing ESP-NOW in CI with real hardware.